Loop recreation for thread-level speculation on multicore processors

Inter-iteration dependences in loops can hinder loop-level parallelism. For some loops, existing thread-level speculation (TLS) techniques fail to expose their inherent loop-level parallelism, because some inter-iteration dependences are too costly to synchronize, predict, pre-compute and isolate. This paper presents a compiler technique called loop recreation to change the nature of some dependences (by turning some inter-iteration dependences into intra-iteration ones and vice versa) in a loop so that the inter-iteration dependences in the transformed loop are less costly to enforce at run time than those in the original loop. We present an algorithm for finding an optimal loop recreation transformation with respect to a simple misspeculation cost model and demonstrate performance advantages of loop recreation over two recent techniques for multicore systems running nine representative irregular applications.